1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor substrate, and more particularly, to a method of manufacturing a high grade GaN substrate.
2. Description of the Related Art
GaN is a material widely used for transistors, field emitters and optical devices as well as microelectronics devices. GaN is used for producing various kinds of compound semiconductor materials such as AlGaN, InGaN and AlInGaN.
A GaN layer is usually grown on a sapphire substrate or a silicon carbide (SiC) substrate. However, since the lattice constant of a sapphire substrate or silicon carbide substrate is different from that of a GaN layer, the GaN layer grown on the sapphire substrate or silicon carbide substrate contains many small crystal grains of a hexagonal system. The crystal grains have a high defect density and a warped and rotary distribution provoking a broad X-ray rocking curve. Here, the defective density of a GaN layer is about 108-10/cm2.
As the defect density of a GaN layer decreases, the applicability of the GaN layer increases. Accordingly, a variety of GaN layer manufacturing methods for lowering the defect density of a GaN layer have been proposed. FIGS. 1 through 4 show one of these methods step by step. FIGS. 5 and 6 show the steps of another method.
Referring to FIG. 1, a GaN layer 12 is grown on a sapphire substrate (or a silicon carbide substrate) 10. Here, the defect density of the GaN layer 12 is at least 108/cm2. Reference numeral 13 denotes a symbolized crystalline defect. As shown in FIG. 2, a silicon oxide mask layer 14 is formed in a predetermined pattern on the GaN layer 12. Subsequently, the growth of the GaN layer 12 is continued, as shown in FIG. 3. However, the GaN layer 16 does not vertically grow above the silicon oxide mask layer 14 but vertically grows on an exposed portion which is not covered with the silicon oxide mask layer 14. Thereafter, when the thickness of the vertically grown GaN layer 16 is significantly larger than that of the silicon oxide mask layer 14, the GaN layer 16 laterally grows on the silicon oxide mask layer 14. The GaN layer 16 continuously grows, and finally, the boundaries of the GaN layer 16, which laterally grows starting from both sides of the silicon oxide mask layer 14 and extends on the silicon oxide mask layer 14, meet, as shown in FIG. 4. With such a step, a second GaN layer 16 having a planarized surface is formed on the GaN layer 12 so that the entire surface of the silicon oxide mask layer 14 is covered with the second GaN layer 16. Here, due to the silicon oxide mask layer 14 involved in the growth of the second GaN layer 16, a tilt boundary Btilt is formed within the second GaN layer 16 directly upward from the boundary of the silicon oxide mask layer 14. In addition, a coalesced boundary Bc is formed at a portion where the two boundaries of the second GaN layer 16 growing from both sides of the silicon oxide mask layer 14 meet.
The more detailed description of the above GaN layer growth method is disclosed in U.S. Pat. No. 6,051,849 issued to Davis et al.
The second GaN layer 16 has the following characteristics. As shown in FIG. 4, the second GaN layer 16 has a defect density difference between a first portion 16a formed on the silicon oxide mask layer 14 and a second portion 16b formed between silicon oxide mask layers 14. In other words, the defect density of the first portion 16a is much lower than that of the GaN layer 12, but the defect density of the second portion 16b is almost the same as that of the GaN layer 12. It can be derived from this result that the potential of the GaN layer 12 does not propagate to form the second GaN layer 16 having a lower defect density than the GaN layer 12 when the GaN layer 12 laterally grows, while the potential of the GaN layer 12 propagates resulting in no improvement in a defect density when the GaN layer 12 vertically grows.
Another example of a conventional technique of growing a GaN layer will be described below with reference to FIGS. 5 and 6. Referring to FIG. 5, a GaN layer 12 is grown on a sapphire substrate (or a silicon carbide substrate) 10. A predetermined region of the GaN layer 12 is etched. A trench 18 having a predetermined depth is formed in the sapphire substrate 10 exposed by the etching process. Thereafter, as shown in FIG. 6, in a state in which the GaN layer 12 is formed on the entire surface of the sapphire substrate 10 except the trench 18, a third GaN layer 20 is grown on the sapphire substrate 10 and the GaN layer 12. Here, the third GaN layer 20 does not grow at the etched portion in the sapphire substrate 10, that is, at the trench 18 region, in either direction between vertical and horizontal directions while the third GaN layer 20 grows vertically and horizontally at the portion not etched in the sapphire substrate 10. During this process, the third GaN layer 20 is not formed in the trench 18 region, so the trench 18 remains as a void 22 after completion of the growth of the third GaN layer 20.
As described above, according to a conventional method of growing a GaN layer, a GaN layer is formed first on a sapphire substrate (or a silicon carbide substrate), and a mask layer is formed on the GaN layer or a trench is formed at a predetermined region of the sapphire substrate in order to prevent the potential of the GaN layer from propagating, thereby forming another GaN layer having a lower defect density. Such conventional methods of growing a GaN layer have the following problems.
First, in the case of the first conventional method shown in FIGS. 1 through 4, due to the surface tension difference between the second GaN layer 16 and the silicon oxide mask layer 14, the crystals of the second GaN layer 16 are tilted forming defects at the coalesced boundary. Moreover, during this process, grooves are formed on the surface of the second GaN layer 16.
Second, since a different sort of material such as a silicon oxide mask layer is introduced, a strain distribution in a growing GaN layer is non-uniform.
Third, since the heat conductivity of silicon oxide (SiO2) used to form a mask layer is lower than a GaN layer, the thermal reliability of a device may be degraded when the device is formed on the GaN layer formed on the mask layer.
Fourth, in the case where the void 22 is formed between the grown third GaN layer 20 and the sapphire substrate 10, as shown in FIG. 6, the resistance of a device formed on the third GaN layer 20 increases, which lowers the reliability of the device.
Fifth, the structure of a device may be vulnerable due to the void 22.
Sixth, in the case of the conventional method shown in FIGS. 5 and 6, it is necessary to etch the sapphire substrate 10 to form the trench 18. However, it is not easy to etch the sapphire substrate 10.
To solve the above-described problems, it is an object of the present invention to provide a method of manufacturing a high-grade semiconductor substrate without using a mask layer or by preventing crystalline defects from propagating to the surface of a grown semiconductor substrate even if using the mask layer.
To achieve the above object of the invention, there is provided a method of manufacturing a semiconductor substrate including a first step of forming a rugged portion having a predetermined depth in a first semiconductor substrate; and a second step of forming a second semiconductor substrate on the first semiconductor substrate at a lateral growth rate fast enough to cover the GaN thin film vertically grown with the GaN thin film laterally grown so that the rugged portion is covered with the second semiconductor substrate.
Here, the first step includes forming a trench in the first semiconductor substrate, and the second step further includes forming a mask on the first semiconductor substrate around the trench.
Alternatively, the first step includes the sub steps of forming a first rugged portion in the first semiconductor substrate, and transforming the first rugged portion into a second rugged portion.
The first semiconductor substrate is realized as a III-V compound semiconductor substrate, and preferably, as a GaN substrate.
The first rugged portion is formed to include protrusions, the surface of which is composed of a top and a slope bordered by the top, and a recess between the protrusions. The second rugged portion is formed to include a second protrusions having the shape of a pyramid with a sharp point, and a recess between the second protrusions.
According to the present invention, the defect density of a lower semiconductor substrate can be prevented from propagating to an upper semiconductor substrate, thereby obtaining the upper semiconductor substrate having a lower defect density than the lower semiconductor substrate. In addition, a low defect density area in the upper semiconductor substrate is much wider compared to prior art.